Frequency synthesizers capable of synthesizing various frequencies are widely used in wireless communication systems. If such a frequency synthesizer is used in a frequency hopping spread spectrum application, then it is required to perform high-rate switching of frequencies.
Heretofore, there has been used a frequency synthesizer for use in a frequency hopping scheme which is capable of switching high-frequency clock frequencies based on high-rate frequency hopping, as shown in Non-patent document 1, page 405, FIG. 1.
FIG. 26 is a diagram showing an example of a circuit arrangement of a frequency synthesizer of the related art. The frequency synthesizer of the related art comprises VCOs (Voltage-Controlled Oscillators) 1, 2, frequency dividers 3, 4, CML (Current Mode Logic) selector 5, CML SSB (Single Side Band) mixer 6, and CML buffer 7.
Operation of the frequency synthesizer of the related art shown in FIG. 26 will be described below. VCOs 1, 2 generate and output respective differential signals having different frequencies. Frequency dividers 3, 4 frequency-divide the respective output signals from VCOs 1, 2 by half, and output the frequency-divided signals to CML selector 5. The output signals from frequency dividers 3, 4 are four-phase signals (signals having phases of 0°, 90°, 180°, and 270°).
CML selector 5 selects either one of the two signals input from frequency dividers 3, 4, and outputs the selected signal to CML SSB mixer 6. CML SSB mixer 6 is supplied with the output signal from CML selector 5 and input signal 13, and outputs output signal 14. The frequency of output signal 14 is represented by the sum of, or the difference between, the frequency of output signal 12 from CML selector 5 and the frequency of input signal 13. Input signal 13 is also a four-phase signal is the output signal from CML selector 5.
Finally, output signal 14 from CML SSB mixer 6 is supplied to CML buffer 7, which adjusts the gain of the signal and generates signal 15 that is transmitted to another circuit.
The frequency synthesizer of the related art shown in FIG. 26 is capable of high-rate switching of frequencies by switching between the signals to be selected by CML selector 5.
The frequency synthesizer of the related art, however, is problematic in that since frequency dividers 3, 4 generate the four-phase signals by frequency-dividing the high-frequency signals generated by VCOs 1, 2, the frequency synthesizer has a high power consumption rate because of VCOs 1, 2 which operate at high frequencies.
The frequency synthesizer of the related art is also disadvantageous in that because its CML circuits use signals having small signal amplitudes, the SN ratio (signal to noise ratio) of the generated signals is small.
Generally, frequency synthesizers are required to operate at a lower voltage since the frequency generated thereby is higher. Specifically, a small 90 nm CMOS process required to achieve 100 GHz operation needs to operate at a power supply voltage of 1 V or lower. However, inasmuch as the frequency synthesizer of the required art comprises CML circuits, it has an increased number of cascaded MOS transistors and cannot be operated at a low voltage.
Non-patent document 1: Christoph Sandner et al., “A 3 GHz to 7 GHz Fast-Hopping Frequency Synthesizer for UWB”, IWUWBT (International Workshop on UWB Technologies) 2004, p. 405-409.